1. Field of the Invention
The present invention generally refers to a semiconductor technology. In particular, it relates to a method for forming on a semiconductor substrate a silicon-containing insulation film having high chemical stability and low dielectric constant by using a plasma CVD (chemical vapor deposition) apparatus.
2. Description of the Related Art
The demand for semiconductors offering higher processing speeds and smaller circuits in recent years is giving rise to a need to reduce wiring resistances and inter-wiring volumes to prevent signal delays in multi-layer wiring structures.
To reduce wiring resistances, wirings that use copper as the main conductor material are being examined. To form copper wirings, the so-called damascene structure is used wherein a wiring metal that uses copper as the main conductor material is deposited on a substrate, including inside grooves formed in an insulation film, after which excessive wiring metal in areas outside the grooves is removed by the CMP method to form a wiring pattern in the grooves. With the damascene structure, a wiring metal is deposited on a substrate, including the inside grooves, after which excessive wiring metal in areas outside the grooves is removed by the CMP method to form wirings inside the grooves. Damascene structures are largely divided into single damascene and dual damascene structures. A single damascene structure is formed, for example, by the following procedure: (1) Deposit an insulation film and cure the film; (2) Form trenches in the insulation film; (3) deposit a wiring metal on the insulation film and also inside the trenches; and (4) grind the wiring metal layer via CMP so that the metal remains only inside the trench. This way, embedded wirings can be formed inside the trenches. A dual damascene structure is formed, for example, by the following procedure: (1) Deposit an insulation film and cure the film; (2) form trenches, as well as via holes in the insulation film for connection with the bottom wiring layer; (3) deposit a wiring metal layer on this insulation film and also inside the trenches and via holes; and (4) grind the wiring metal layer via CMP so that the metal remains only inside the trenches and via holes. This way, embedded wirings can be formed inside the trench and via holes. There are mainly two ways to form a dual damascene structure, including [1] the method to form trenches first, and [2] the method to form via holes first. Of the two methods, [2] involves a simpler process and is therefore used more widely.
In either of the structures described above, the inter-layer insulation films are etched using hard mask, photoresist or other masking material as deemed appropriate, after which ashing is performed. However, it is impossible to remove all residues, and thus wet etching must be performed using a chemical solution. If an insulation film of low dielectric constant is used for inter-layer films, this wet etching presents problems such as increase in dielectric constant and decrease in film thickness. U.S. Pat. No. 6,846,515 describes a method for forming an insulation film of low dielectric constant by forming voids in film through a curing process using porogen gas. However, this method cannot solve the aforementioned problems in practical applications involving semiconductor devices.
To reduce inter-wiring volumes, the dielectric constants of insulation films between multiple wiring layers must be lowered, and therefore insulation films of low dielectric constants have been developed for this purpose.
Traditionally a silicon oxide film SiOx is formed by adding oxygen O2 as an oxidizing agent, as well as nitrogen oxide NO or nitrous oxide N2O, to SiH4, Si(OC2 H5)4 or other silicon material gas, and then processing the mixture by means of heat or plasma energy. Silicone oxide films thus formed have a dielectric constant ∈ of approx. 4.0. On the other hand, the spin coat method that uses inorganic silicon oxide glass (SOG) as a material forms insulation films having a low dielectric constant ∈ of approx. 2.3. Also, the plasma CVD method that uses CxFyHz as the material gas forms fluorinated amorphous carbon films having a low dielectric constant ∈ in a range of 2.0 to 2.4. In addition, the plasma CVD method that uses a silicon-containing hydrocarbon (such as P-TMOS (phenyl trimethoxysilane)) as the material gas forms insulation films having a low dielectric constant ∈ of approx. 3.1. Furthermore, the plasma CVD method that uses a silicon-containing hydrocarbon having multiple alkoxy groups as the material gas, forms insulation films having a low dielectric constant ∈ of approx. 2.5 through optimization of conditions.
However, the aforementioned traditional approaches present problems as described below. First, inorganic SOG insulation films formed by the spin coat method present problems in that the material is not evenly distributed over the silicon substrate and that the apparatus used in the curing process after coating of material is expensive. Also, fluorinated amorphous carbon films formed by the plasma CVD method using CxFyHz as the material gas have drawbacks including low heat resistance of the film (370° C. or below), poor adhesion property with respect to silicon materials, and low mechanical strength of the film. If P-TMOS having three alkoxy groups is used among silicon-containing hydrocarbons, the polymerized oligomer cannot form a linear structure like that of siloxane. As a result, a porous structure is not formed on the silicon substrate and the dielectric constant cannot be lowered to a desired level. If other silicon-containing hydrocarbon having multiple alkoxy groups is used as the material gas, the polymerized oligomer obtained under optimized conditions forms a linear structure like that of siloxane, which allows for formation of a porous structure on the silicon substrate and lowering of the dielectric constant to a desired level. However, this oligomer having a linear structure provides weak inter-oligomer bonding strength, thus resulting in low mechanical strength of the film.